The present invention concerns a semiconductor device and a method of manufacturing the same and it particularly relates to a semiconductor device having a polysilicon resistor and a field effect transistor, as well as a manufacturing method thereof.
A CMOS (Complementary Metal Oxide Semiconductor) field effect transistor having a PMOS field effect transistor and an NMOS field effect transistor as the field effect transistor of relatively low consumption power is used frequently as an active element together with a resistor element in a semiconductor device. In the semiconductor device of this type, the CMOS field effect transistor is formed in an element forming region defined by an element isolation insulating film in the main surface of a semiconductor substrate. On the other hand, the resistance element is formed over the element isolation insulating film.
A polysilicon resistor is formed as a resistance element. The polysilicon resistor is formed as described below. At first, a polysilicon film is formed over the semiconductor substrate and thereby setting the polysilicon film to a desired resistance value by implanting an impurity at a predetermined concentration into the polysilicon film. Then, the polysilicon film is patterned into a predetermined shape as a resistance element. Then, a contact region containing a high concentration region to which an interconnect, etc. are connected electrically is formed by implanting an impurity having a concentration higher than a predetermined concentration in a predetermined region of the polysilicon film patterned into a predetermined shape is formed. Thus, a polysilicon resistor is formed.
The step of implanting the impurity into the polysilicon film is performed simultaneously with a step of implanting an impurity for forming a source/drain regions of the PMOS field effect transistor or simultaneously with a step of implanting an impurity for forming the source/drain regions of the NMOS field effect transistor.
The CMOS field effect transistor formed in the element forming region and the polysilicon resistor formed over the element isolation insulating film are covered by an interlayer insulating film. Contact holes for exposing a contact region of the polysilicon resistor and contact holes for exposing the respective source/drain regions of the CMOS field effect transistor are formed in the interlayer insulating film. Plugs are formed in each of the contact holes.
Predetermined interconnects are formed over the interlayer insulating film and a polysilicon resistor, or a PMOS field effect transistor or an NMOS field effect transistor is connected electrically by way of the plugs. Examples of literatures disclosing such a semiconductor device having the polysilicon resistor and the field effect transistor include Japanese Unexamined Patent Publication Nos. 2002-176109 and 2008-124061.